Layer Information
| layer_index | layer_name | layer_type | layer_shape | layer_duration (us) | layer_allocated_bytes | layer_peak_allocated_bytes | layer_allocator_bytes_in_use | layer_allocator_name | layer_host_temp_mem_bytes | layer_device_temp_mem_bytes | layer_host_persistent_mem_bytes | layer_device_persistent_mem_bytes |
|---|
layer_index | layer_name | layer_type | layer_shape | layer_duration (us) | layer_allocated_bytes | layer_peak_allocated_bytes | layer_allocator_bytes_in_use | layer_allocator_name | layer_host_temp_mem_bytes | layer_device_temp_mem_bytes | layer_host_persistent_mem_bytes | layer_device_persistent_mem_bytes |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 2 | InceptionResnetV2/InceptionResnetV2/Conv2d_1a_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 149 149 32]] | 2305 | 2841728 | 2841728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 3 | InceptionResnetV2/InceptionResnetV2/Conv2d_1a_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 149 149 32]] | 353 | 2841728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 4 | InceptionResnetV2/InceptionResnetV2/Conv2d_1a_3x3/Relu | Relu | [[1 149 149 32]] | 133.333 | 2841728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 5 | InceptionResnetV2/InceptionResnetV2/Conv2d_2a_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 147 147 32]] | 4608.667 | 2765952 | 2765952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 6 | InceptionResnetV2/InceptionResnetV2/Conv2d_2a_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 147 147 32]] | 342.333 | 2765952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 7 | InceptionResnetV2/InceptionResnetV2/Conv2d_2a_3x3/Relu | Relu | [[1 147 147 32]] | 145.333 | 2765952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 8 | InceptionResnetV2/InceptionResnetV2/Conv2d_2b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 147 147 64]] | 6163 | 5531904 | 5531904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 9 | InceptionResnetV2/InceptionResnetV2/Conv2d_2b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 147 147 64]] | 526 | 5531904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 10 | InceptionResnetV2/InceptionResnetV2/Conv2d_2b_3x3/Relu | Relu | [[1 147 147 64]] | 182.333 | 5531904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 11 | InceptionResnetV2/InceptionResnetV2/MaxPool_3a_3x3/MaxPool | MaxPool | [[1 73 73 64]] | 1226.667 | 1364224 | 1364224 | 0 | cpu | 0 | 0 | 0 | 0 |
| 12 | InceptionResnetV2/InceptionResnetV2/Conv2d_3b_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 73 73 80]] | 599.667 | 1705280 | 1705280 | 0 | cpu | 0 | 0 | 0 | 0 |
| 13 | InceptionResnetV2/InceptionResnetV2/Conv2d_3b_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 73 73 80]] | 235.667 | 1705280 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 14 | InceptionResnetV2/InceptionResnetV2/Conv2d_3b_1x1/Relu | Relu | [[1 73 73 80]] | 117.667 | 1705280 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 15 | InceptionResnetV2/InceptionResnetV2/Conv2d_4a_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 71 71 192]] | 9330.667 | 3871488 | 3871488 | 0 | cpu | 0 | 0 | 0 | 0 |
| 16 | InceptionResnetV2/InceptionResnetV2/Conv2d_4a_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 71 71 192]] | 354.667 | 3871488 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 17 | InceptionResnetV2/InceptionResnetV2/Conv2d_4a_3x3/Relu | Relu | [[1 71 71 192]] | 145.333 | 3871488 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 18 | InceptionResnetV2/InceptionResnetV2/MaxPool_5a_3x3/MaxPool | MaxPool | [[1 35 35 192]] | 508 | 940800 | 940800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 19 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 96]] | 943.667 | 470400 | 470400 | 0 | cpu | 0 | 0 | 0 | 0 |
| 20 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 48]] | 836.333 | 235200 | 235200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 21 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 48]] | 131.667 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 22 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 48]] | 27.333 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 23 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 64]] | 898.667 | 313600 | 313600 | 0 | cpu | 0 | 0 | 0 | 0 |
| 24 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 96]] | 220.333 | 470400 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 25 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/Branch_3/AvgPool_0a_3x3/AvgPool | AvgPool | [[1 35 35 192]] | 1332 | 940800 | 940800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 26 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 64]] | 272.667 | 313600 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 27 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/Branch_2/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 64]] | 34.667 | 313600 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 28 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/Branch_3/Conv2d_0b_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 64]] | 1002 | 313600 | 313600 | 0 | cpu | 0 | 0 | 0 | 0 |
| 29 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/Branch_3/Conv2d_0b_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 64]] | 251.333 | 313600 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 30 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/Branch_1/Conv2d_0b_5x5/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 64]] | 3057.333 | 313600 | 313600 | 0 | cpu | 0 | 0 | 0 | 0 |
| 31 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/Branch_1/Conv2d_0b_5x5/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 64]] | 155.333 | 313600 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 32 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 96]] | 2151.667 | 470400 | 470400 | 0 | cpu | 0 | 0 | 0 | 0 |
| 33 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 96]] | 245 | 470400 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 34 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/Branch_2/Conv2d_0b_3x3/Relu | Relu | [[1 35 35 96]] | 90.333 | 470400 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 35 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 96]] | 1572.667 | 470400 | 470400 | 0 | cpu | 0 | 0 | 0 | 0 |
| 36 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 96]] | 145 | 470400 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 37 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/concat | ConcatV2 | [[1 35 35 320]] | 166.667 | 1568000 | 1568000 | 0 | cpu | 0 | 0 | 0 | 0 |
| 38 | InceptionResnetV2/InceptionResnetV2/Mixed_5b/Branch_0/Conv2d_1x1/Relu | Relu | [[1 35 35 320]] | 124.333 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 39 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 649.667 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 40 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 711 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 41 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 89.667 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 42 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 609.667 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 43 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 105 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 44 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 25 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 45 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 153 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 46 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/Branch_2/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 22.667 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 47 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 453.667 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 48 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 105.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 49 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 48]] | 519 | 235200 | 235200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 50 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 48]] | 112 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 51 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/Branch_2/Conv2d_0b_3x3/Relu | Relu | [[1 35 35 48]] | 27.667 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 52 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 64]] | 605 | 313600 | 313600 | 0 | cpu | 0 | 0 | 0 | 0 |
| 53 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 64]] | 115.667 | 313600 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 54 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/concat | ConcatV2 | [[1 35 35 128]] | 136 | 627200 | 627200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 55 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/Branch_0/Conv2d_1x1/Relu | Relu | [[1 35 35 128]] | 92.667 | 627200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 56 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 35 35 320]] | 817 | 1568000 | 1568000 | 0 | cpu | 0 | 0 | 0 | 0 |
| 57 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/mul | Mul | [[1 35 35 320]] | 125.667 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 58 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/add | Add | [[1 35 35 320]] | 156.333 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 59 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_1/Relu | Relu | [[1 35 35 320]] | 119.333 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 60 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 668.333 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 61 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 665.667 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 62 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 654.333 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 63 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 116 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 64 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 132.667 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 65 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 161 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 66 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/Branch_2/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 22 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 67 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 23 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 68 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 48]] | 447 | 235200 | 235200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 69 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 472.333 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 70 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 48]] | 96.667 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 71 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/Branch_2/Conv2d_0b_3x3/Relu | Relu | [[1 35 35 48]] | 29.333 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 72 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 93.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 73 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 64]] | 626.667 | 313600 | 313600 | 0 | cpu | 0 | 0 | 0 | 0 |
| 74 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 64]] | 116 | 313600 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 75 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/concat | ConcatV2 | [[1 35 35 128]] | 139.333 | 627200 | 627200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 76 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/Branch_0/Conv2d_1x1/Relu | Relu | [[1 35 35 128]] | 93 | 627200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 77 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 35 35 320]] | 817.333 | 1568000 | 1568000 | 0 | cpu | 0 | 0 | 0 | 0 |
| 78 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/mul | Mul | [[1 35 35 320]] | 118.667 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 79 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/add | Add | [[1 35 35 320]] | 150.333 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 80 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_2/Relu | Relu | [[1 35 35 320]] | 111 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 81 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 641.333 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 82 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 681.333 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 83 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 92.667 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 84 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 681.333 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 85 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 22.667 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 86 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 104.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 87 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 114 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 88 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/Branch_2/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 22 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 89 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 410 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 90 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 149.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 91 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 48]] | 439.667 | 235200 | 235200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 92 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 48]] | 112.333 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 93 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/Branch_2/Conv2d_0b_3x3/Relu | Relu | [[1 35 35 48]] | 30.667 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 94 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 64]] | 612.333 | 313600 | 313600 | 0 | cpu | 0 | 0 | 0 | 0 |
| 95 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 64]] | 108.333 | 313600 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 96 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/concat | ConcatV2 | [[1 35 35 128]] | 140.333 | 627200 | 627200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 97 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/Branch_0/Conv2d_1x1/Relu | Relu | [[1 35 35 128]] | 96.333 | 627200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 98 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 35 35 320]] | 811 | 1568000 | 1568000 | 0 | cpu | 0 | 0 | 0 | 0 |
| 99 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/mul | Mul | [[1 35 35 320]] | 119.333 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 100 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/add | Add | [[1 35 35 320]] | 157 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 101 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_3/Relu | Relu | [[1 35 35 320]] | 119.333 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 102 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 595.333 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 103 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 575.667 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 104 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 145.667 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 105 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 156 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 106 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 727 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 107 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 23.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 108 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 115 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 109 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/Branch_2/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 23.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 110 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 399 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 111 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 113.667 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 112 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 48]] | 409.667 | 235200 | 235200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 113 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 48]] | 104 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 114 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/Branch_2/Conv2d_0b_3x3/Relu | Relu | [[1 35 35 48]] | 27 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 115 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 64]] | 611 | 313600 | 313600 | 0 | cpu | 0 | 0 | 0 | 0 |
| 116 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 64]] | 111.333 | 313600 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 117 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/concat | ConcatV2 | [[1 35 35 128]] | 137.333 | 627200 | 627200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 118 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/Branch_0/Conv2d_1x1/Relu | Relu | [[1 35 35 128]] | 91.667 | 627200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 119 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 35 35 320]] | 819.667 | 1568000 | 1568000 | 0 | cpu | 0 | 0 | 0 | 0 |
| 120 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/mul | Mul | [[1 35 35 320]] | 121.333 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 121 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/add | Add | [[1 35 35 320]] | 148.667 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 122 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_4/Relu | Relu | [[1 35 35 320]] | 113.333 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 123 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 674 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 124 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 694.333 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 125 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 83 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 126 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/Branch_2/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 23 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 127 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 94 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 128 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 707 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 129 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 118.667 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 130 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 23.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 131 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 48]] | 514 | 235200 | 235200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 132 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 456.333 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 133 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 48]] | 110.667 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 134 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/Branch_2/Conv2d_0b_3x3/Relu | Relu | [[1 35 35 48]] | 27.333 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 135 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 104.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 136 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 64]] | 622 | 313600 | 313600 | 0 | cpu | 0 | 0 | 0 | 0 |
| 137 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 64]] | 111.667 | 313600 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 138 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/concat | ConcatV2 | [[1 35 35 128]] | 122.667 | 627200 | 627200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 139 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/Branch_0/Conv2d_1x1/Relu | Relu | [[1 35 35 128]] | 94.333 | 627200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 140 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 35 35 320]] | 829.333 | 1568000 | 1568000 | 0 | cpu | 0 | 0 | 0 | 0 |
| 141 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/mul | Mul | [[1 35 35 320]] | 120.667 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 142 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/add | Add | [[1 35 35 320]] | 151.667 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 143 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_5/Relu | Relu | [[1 35 35 320]] | 121 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 144 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 638.667 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 145 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 677.333 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 146 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 690 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 147 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 120.667 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 148 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 100.667 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 149 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 105.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 150 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 20.667 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 151 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/Branch_2/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 22.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 152 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 48]] | 540 | 235200 | 235200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 153 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 452.333 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 154 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 83.667 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 155 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 48]] | 101 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 156 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/Branch_2/Conv2d_0b_3x3/Relu | Relu | [[1 35 35 48]] | 28.333 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 157 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 64]] | 611.667 | 313600 | 313600 | 0 | cpu | 0 | 0 | 0 | 0 |
| 158 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 64]] | 106 | 313600 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 159 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/concat | ConcatV2 | [[1 35 35 128]] | 131 | 627200 | 627200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 160 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/Branch_0/Conv2d_1x1/Relu | Relu | [[1 35 35 128]] | 92.333 | 627200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 161 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 35 35 320]] | 836 | 1568000 | 1568000 | 0 | cpu | 0 | 0 | 0 | 0 |
| 162 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/mul | Mul | [[1 35 35 320]] | 119.667 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 163 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/add | Add | [[1 35 35 320]] | 157.667 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 164 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_6/Relu | Relu | [[1 35 35 320]] | 125.333 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 165 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 638 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 166 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 719.333 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 167 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 76.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 168 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/Branch_2/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 25.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 169 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 134.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 170 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 713.333 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 171 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 106.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 172 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 21.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 173 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 48]] | 484.333 | 235200 | 235200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 174 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 48]] | 133 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 175 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/Branch_2/Conv2d_0b_3x3/Relu | Relu | [[1 35 35 48]] | 29.333 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 176 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 461 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 177 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 138.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 178 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 64]] | 614.667 | 313600 | 313600 | 0 | cpu | 0 | 0 | 0 | 0 |
| 179 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 64]] | 113 | 313600 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 180 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/concat | ConcatV2 | [[1 35 35 128]] | 138.333 | 627200 | 627200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 181 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/Branch_0/Conv2d_1x1/Relu | Relu | [[1 35 35 128]] | 94.667 | 627200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 182 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 35 35 320]] | 825 | 1568000 | 1568000 | 0 | cpu | 0 | 0 | 0 | 0 |
| 183 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/mul | Mul | [[1 35 35 320]] | 115.667 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 184 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/add | Add | [[1 35 35 320]] | 154.667 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 185 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_7/Relu | Relu | [[1 35 35 320]] | 119.333 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 186 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 698.667 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 187 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 666.667 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 188 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 115.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 189 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 683.333 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 190 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 109 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 191 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/Branch_2/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 20.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 192 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 101.667 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 193 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 21.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 194 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 505.667 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 195 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 48]] | 538.333 | 235200 | 235200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 196 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 96.667 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 197 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 48]] | 108 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 198 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/Branch_2/Conv2d_0b_3x3/Relu | Relu | [[1 35 35 48]] | 29.333 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 199 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 64]] | 604 | 313600 | 313600 | 0 | cpu | 0 | 0 | 0 | 0 |
| 200 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 64]] | 106.667 | 313600 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 201 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/concat | ConcatV2 | [[1 35 35 128]] | 136 | 627200 | 627200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 202 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/Branch_0/Conv2d_1x1/Relu | Relu | [[1 35 35 128]] | 93.667 | 627200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 203 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 35 35 320]] | 827.667 | 1568000 | 1568000 | 0 | cpu | 0 | 0 | 0 | 0 |
| 204 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/mul | Mul | [[1 35 35 320]] | 126.333 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 205 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/add | Add | [[1 35 35 320]] | 152.667 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 206 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_8/Relu | Relu | [[1 35 35 320]] | 124.333 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 207 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 652.667 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 208 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 672.333 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 209 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 88 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 210 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 98.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 211 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 711 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 212 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 22.667 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 213 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 104.667 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 214 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/Branch_2/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 22.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 215 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 447.333 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 216 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 106 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 217 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 48]] | 498.667 | 235200 | 235200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 218 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 48]] | 110.333 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 219 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/Branch_2/Conv2d_0b_3x3/Relu | Relu | [[1 35 35 48]] | 27.333 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 220 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 64]] | 607.667 | 313600 | 313600 | 0 | cpu | 0 | 0 | 0 | 0 |
| 221 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 64]] | 106 | 313600 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 222 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/concat | ConcatV2 | [[1 35 35 128]] | 127 | 627200 | 627200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 223 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/Branch_0/Conv2d_1x1/Relu | Relu | [[1 35 35 128]] | 92.667 | 627200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 224 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 35 35 320]] | 822.333 | 1568000 | 1568000 | 0 | cpu | 0 | 0 | 0 | 0 |
| 225 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/mul | Mul | [[1 35 35 320]] | 120 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 226 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/add | Add | [[1 35 35 320]] | 153 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 227 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_9/Relu | Relu | [[1 35 35 320]] | 120 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 228 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 662.333 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 229 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 675 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 230 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 92.667 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 231 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/Branch_2/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 23.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 232 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 193.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 233 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 692.333 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 234 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 107 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 235 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 32]] | 22 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 236 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 48]] | 471 | 235200 | 235200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 237 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 48]] | 108.333 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 238 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 32]] | 448 | 156800 | 156800 | 0 | cpu | 0 | 0 | 0 | 0 |
| 239 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/Branch_2/Conv2d_0b_3x3/Relu | Relu | [[1 35 35 48]] | 26 | 235200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 240 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 32]] | 92.333 | 156800 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 241 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 64]] | 599 | 313600 | 313600 | 0 | cpu | 0 | 0 | 0 | 0 |
| 242 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/Branch_2/Conv2d_0c_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 64]] | 96 | 313600 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 243 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/concat | ConcatV2 | [[1 35 35 128]] | 129.667 | 627200 | 627200 | 0 | cpu | 0 | 0 | 0 | 0 |
| 244 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/Branch_0/Conv2d_1x1/Relu | Relu | [[1 35 35 128]] | 95 | 627200 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 245 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 35 35 320]] | 825 | 1568000 | 1568000 | 0 | cpu | 0 | 0 | 0 | 0 |
| 246 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/mul | Mul | [[1 35 35 320]] | 120.333 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 247 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/add | Add | [[1 35 35 320]] | 153.667 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 248 | InceptionResnetV2/InceptionResnetV2/Repeat/block35_10/Relu | Relu | [[1 35 35 320]] | 115.333 | 1568000 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 249 | InceptionResnetV2/InceptionResnetV2/Mixed_6a/Branch_2/MaxPool_1a_3x3/MaxPool | MaxPool | [[1 17 17 320]] | 310.667 | 369920 | 369920 | 0 | cpu | 0 | 0 | 0 | 0 |
| 250 | InceptionResnetV2/InceptionResnetV2/Mixed_6a/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 256]] | 2397 | 1254400 | 1254400 | 0 | cpu | 0 | 0 | 0 | 0 |
| 251 | InceptionResnetV2/InceptionResnetV2/Mixed_6a/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 256]] | 509 | 1254400 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 252 | InceptionResnetV2/InceptionResnetV2/Mixed_6a/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 35 35 256]] | 169.667 | 1254400 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 253 | InceptionResnetV2/InceptionResnetV2/Mixed_6a/Branch_0/Conv2d_1a_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 384]] | 11201.333 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 254 | InceptionResnetV2/InceptionResnetV2/Mixed_6a/Branch_0/Conv2d_1a_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 384]] | 294 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 255 | InceptionResnetV2/InceptionResnetV2/Mixed_6a/Branch_0/Conv2d_1a_3x3/Relu | Relu | [[1 17 17 384]] | 309 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 256 | InceptionResnetV2/InceptionResnetV2/Mixed_6a/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 35 35 256]] | 12529.667 | 1254400 | 1254400 | 0 | cpu | 0 | 0 | 0 | 0 |
| 257 | InceptionResnetV2/InceptionResnetV2/Mixed_6a/Branch_1/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 35 35 256]] | 206.667 | 1254400 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 258 | InceptionResnetV2/InceptionResnetV2/Mixed_6a/Branch_1/Conv2d_0b_3x3/Relu | Relu | [[1 35 35 256]] | 113 | 1254400 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 259 | InceptionResnetV2/InceptionResnetV2/Mixed_6a/Branch_1/Conv2d_1a_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 384]] | 3647.667 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 260 | InceptionResnetV2/InceptionResnetV2/Mixed_6a/Branch_1/Conv2d_1a_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 384]] | 129.333 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 261 | InceptionResnetV2/InceptionResnetV2/Mixed_6a/Branch_1/Conv2d_1a_3x3/Relu | Relu | [[1 17 17 384]] | 81.333 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 262 | InceptionResnetV2/InceptionResnetV2/Mixed_6a/concat | ConcatV2 | [[1 17 17 1088]] | 160.333 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 263 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_1/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1277.667 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 264 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_1/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 100.667 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 265 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_1/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 21.667 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 266 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_1/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1640.333 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 267 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_1/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 136.667 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 268 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_1/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 756.333 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 269 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_1/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 108.667 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 270 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_1/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 23.667 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 271 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_1/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 989.333 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 272 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_1/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 103.667 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 273 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_1/concat | ConcatV2 | [[1 17 17 384]] | 108.333 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 274 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_1/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 88 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 275 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_1/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1824.667 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 276 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_1/mul | Mul | [[1 17 17 1088]] | 110.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 277 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_1/add | Add | [[1 17 17 1088]] | 142 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 278 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_1/Relu | Relu | [[1 17 17 1088]] | 113 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 279 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_2/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1282.333 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 280 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_2/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 93.333 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 281 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_2/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 21 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 282 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_2/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1664.333 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 283 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_2/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 120.667 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 284 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_2/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 741.667 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 285 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_2/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 112 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 286 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_2/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 24.667 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 287 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_2/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1003 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 288 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_2/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 106.667 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 289 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_2/concat | ConcatV2 | [[1 17 17 384]] | 110.667 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 290 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_2/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 84 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 291 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_2/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1789.667 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 292 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_2/mul | Mul | [[1 17 17 1088]] | 109.333 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 293 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_2/add | Add | [[1 17 17 1088]] | 141.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 294 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_2/Relu | Relu | [[1 17 17 1088]] | 115.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 295 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_3/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1341 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 296 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_3/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 92.667 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 297 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_3/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 20.667 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 298 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_3/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1646.333 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 299 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_3/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 134.667 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 300 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_3/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 723.333 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 301 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_3/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 101.333 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 302 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_3/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 24.333 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 303 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_3/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 974.333 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 304 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_3/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 97.667 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 305 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_3/concat | ConcatV2 | [[1 17 17 384]] | 111.333 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 306 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_3/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 84.333 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 307 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_3/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1801.333 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 308 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_3/mul | Mul | [[1 17 17 1088]] | 112.333 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 309 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_3/add | Add | [[1 17 17 1088]] | 140.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 310 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_3/Relu | Relu | [[1 17 17 1088]] | 110.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 311 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_4/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1344 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 312 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_4/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1530.333 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 313 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_4/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 90.333 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 314 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_4/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 22 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 315 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_4/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 140 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 316 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_4/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 739.333 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 317 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_4/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 107 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 318 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_4/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 23.333 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 319 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_4/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 997.667 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 320 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_4/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 106.667 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 321 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_4/concat | ConcatV2 | [[1 17 17 384]] | 110.667 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 322 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_4/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 86.667 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 323 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_4/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1804 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 324 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_4/mul | Mul | [[1 17 17 1088]] | 112 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 325 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_4/add | Add | [[1 17 17 1088]] | 137.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 326 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_4/Relu | Relu | [[1 17 17 1088]] | 107 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 327 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_5/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1423.333 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 328 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_5/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 90.667 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 329 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_5/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1522 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 330 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_5/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 21 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 331 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_5/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 119.333 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 332 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_5/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 715.667 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 333 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_5/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 106 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 334 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_5/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 23.333 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 335 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_5/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 983 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 336 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_5/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 106.667 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 337 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_5/concat | ConcatV2 | [[1 17 17 384]] | 118 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 338 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_5/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 85 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 339 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_5/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1796.333 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 340 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_5/mul | Mul | [[1 17 17 1088]] | 104.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 341 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_5/add | Add | [[1 17 17 1088]] | 131.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 342 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_5/Relu | Relu | [[1 17 17 1088]] | 115.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 343 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_6/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1328.333 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 344 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_6/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1562.667 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 345 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_6/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 108 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 346 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_6/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 24 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 347 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_6/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 123 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 348 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_6/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 742.333 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 349 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_6/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 107.333 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 350 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_6/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 25 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 351 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_6/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1001.667 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 352 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_6/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 99 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 353 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_6/concat | ConcatV2 | [[1 17 17 384]] | 110.333 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 354 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_6/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 83 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 355 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_6/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1810 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 356 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_6/mul | Mul | [[1 17 17 1088]] | 111.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 357 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_6/add | Add | [[1 17 17 1088]] | 140.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 358 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_6/Relu | Relu | [[1 17 17 1088]] | 110 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 359 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_7/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1498.333 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 360 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_7/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1539 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 361 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_7/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 95 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 362 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_7/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 114 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 363 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_7/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 20.333 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 364 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_7/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 714 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 365 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_7/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 113.667 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 366 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_7/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 24.333 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 367 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_7/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 978 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 368 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_7/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 104.667 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 369 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_7/concat | ConcatV2 | [[1 17 17 384]] | 108.667 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 370 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_7/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 85 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 371 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_7/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1810.667 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 372 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_7/mul | Mul | [[1 17 17 1088]] | 103.333 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 373 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_7/add | Add | [[1 17 17 1088]] | 131 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 374 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_7/Relu | Relu | [[1 17 17 1088]] | 108 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 375 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_8/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1530.333 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 376 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_8/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1383.667 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 377 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_8/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 119 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 378 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_8/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 97.667 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 379 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_8/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 21.667 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 380 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_8/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 719.667 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 381 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_8/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 105.333 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 382 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_8/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 24 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 383 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_8/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 988.667 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 384 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_8/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 100 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 385 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_8/concat | ConcatV2 | [[1 17 17 384]] | 106.333 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 386 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_8/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 85 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 387 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_8/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1792.667 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 388 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_8/mul | Mul | [[1 17 17 1088]] | 109.333 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 389 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_8/add | Add | [[1 17 17 1088]] | 139.333 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 390 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_8/Relu | Relu | [[1 17 17 1088]] | 102.333 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 391 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_9/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1476.667 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 392 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_9/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 99 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 393 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_9/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1534.667 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 394 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_9/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 19.333 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 395 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_9/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 124 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 396 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_9/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 708.667 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 397 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_9/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 108.333 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 398 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_9/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 24.667 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 399 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_9/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1002.667 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 400 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_9/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 103.667 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 401 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_9/concat | ConcatV2 | [[1 17 17 384]] | 108.667 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 402 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_9/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 84.333 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 403 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_9/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1866.333 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 404 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_9/mul | Mul | [[1 17 17 1088]] | 114 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 405 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_9/add | Add | [[1 17 17 1088]] | 134.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 406 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_9/Relu | Relu | [[1 17 17 1088]] | 112.333 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 407 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_10/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1513.333 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 408 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_10/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1428.667 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 409 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_10/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 104.333 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 410 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_10/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 136.667 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 411 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_10/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 22 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 412 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_10/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 707.333 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 413 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_10/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 109.333 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 414 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_10/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 24.333 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 415 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_10/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1002 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 416 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_10/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 95 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 417 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_10/concat | ConcatV2 | [[1 17 17 384]] | 100 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 418 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_10/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 86 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 419 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_10/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1843.333 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 420 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_10/mul | Mul | [[1 17 17 1088]] | 111 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 421 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_10/add | Add | [[1 17 17 1088]] | 143 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 422 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_10/Relu | Relu | [[1 17 17 1088]] | 113.333 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 423 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_11/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1272 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 424 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_11/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 125.333 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 425 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_11/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 20.667 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 426 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_11/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1723 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 427 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_11/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 109.667 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 428 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_11/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 754.333 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 429 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_11/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 109.333 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 430 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_11/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 23 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 431 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_11/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 991.667 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 432 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_11/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 104.333 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 433 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_11/concat | ConcatV2 | [[1 17 17 384]] | 104 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 434 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_11/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 83.333 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 435 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_11/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1845.333 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 436 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_11/mul | Mul | [[1 17 17 1088]] | 112.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 437 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_11/add | Add | [[1 17 17 1088]] | 140.333 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 438 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_11/Relu | Relu | [[1 17 17 1088]] | 113 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 439 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_12/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1182.667 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 440 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_12/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 117 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 441 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_12/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 26 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 442 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_12/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1671.667 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 443 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_12/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 138.333 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 444 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_12/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 808.667 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 445 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_12/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 110 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 446 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_12/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 23.333 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 447 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_12/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1001 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 448 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_12/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 105 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 449 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_12/concat | ConcatV2 | [[1 17 17 384]] | 108 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 450 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_12/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 86 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 451 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_12/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1805.667 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 452 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_12/mul | Mul | [[1 17 17 1088]] | 109.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 453 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_12/add | Add | [[1 17 17 1088]] | 136.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 454 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_12/Relu | Relu | [[1 17 17 1088]] | 100.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 455 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_13/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1419.333 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 456 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_13/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 103 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 457 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_13/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1554.333 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 458 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_13/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 23.333 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 459 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_13/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 115 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 460 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_13/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 700.667 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 461 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_13/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 107.333 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 462 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_13/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 21.667 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 463 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_13/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 987 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 464 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_13/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 110 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 465 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_13/concat | ConcatV2 | [[1 17 17 384]] | 112.333 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 466 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_13/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 84.667 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 467 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_13/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1821.667 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 468 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_13/mul | Mul | [[1 17 17 1088]] | 116 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 469 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_13/add | Add | [[1 17 17 1088]] | 145.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 470 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_13/Relu | Relu | [[1 17 17 1088]] | 114 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 471 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_14/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1366.333 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 472 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_14/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 129.333 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 473 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_14/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 22 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 474 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_14/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1536 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 475 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_14/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 124 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 476 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_14/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 716.667 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 477 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_14/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 103.667 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 478 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_14/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 23.333 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 479 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_14/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1011.667 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 480 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_14/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 96.667 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 481 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_14/concat | ConcatV2 | [[1 17 17 384]] | 102.333 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 482 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_14/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 82 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 483 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_14/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1795.333 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 484 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_14/mul | Mul | [[1 17 17 1088]] | 113 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 485 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_14/add | Add | [[1 17 17 1088]] | 136 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 486 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_14/Relu | Relu | [[1 17 17 1088]] | 110.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 487 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_15/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1567 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 488 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_15/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1451.667 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 489 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_15/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 117.667 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 490 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_15/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 120 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 491 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_15/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 20.667 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 492 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_15/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 713.667 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 493 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_15/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 106 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 494 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_15/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 23.667 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 495 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_15/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1005.333 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 496 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_15/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 103.333 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 497 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_15/concat | ConcatV2 | [[1 17 17 384]] | 105 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 498 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_15/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 82.667 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 499 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_15/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1831.667 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 500 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_15/mul | Mul | [[1 17 17 1088]] | 109.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 501 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_15/add | Add | [[1 17 17 1088]] | 134.333 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 502 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_15/Relu | Relu | [[1 17 17 1088]] | 103 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 503 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_16/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1490.333 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 504 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_16/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1448.333 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 505 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_16/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 106.667 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 506 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_16/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 109 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 507 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_16/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 20.667 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 508 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_16/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 729.333 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 509 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_16/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 101 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 510 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_16/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 24 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 511 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_16/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 992 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 512 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_16/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 99.667 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 513 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_16/concat | ConcatV2 | [[1 17 17 384]] | 102.333 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 514 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_16/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 80.333 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 515 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_16/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1803.667 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 516 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_16/mul | Mul | [[1 17 17 1088]] | 116 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 517 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_16/add | Add | [[1 17 17 1088]] | 136.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 518 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_16/Relu | Relu | [[1 17 17 1088]] | 108.333 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 519 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_17/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1437 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 520 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_17/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 97.333 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 521 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_17/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1544.333 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 522 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_17/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 22.333 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 523 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_17/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 124.667 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 524 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_17/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 702.667 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 525 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_17/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 101.667 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 526 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_17/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 24.333 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 527 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_17/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 999.667 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 528 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_17/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 92.667 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 529 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_17/concat | ConcatV2 | [[1 17 17 384]] | 109 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 530 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_17/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 84.333 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 531 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_17/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1836.667 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 532 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_17/mul | Mul | [[1 17 17 1088]] | 106.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 533 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_17/add | Add | [[1 17 17 1088]] | 134.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 534 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_17/Relu | Relu | [[1 17 17 1088]] | 100 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 535 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_18/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1444.667 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 536 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_18/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1536.333 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 537 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_18/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 105 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 538 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_18/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 23.333 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 539 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_18/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 119 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 540 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_18/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 719 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 541 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_18/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 102.333 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 542 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_18/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 24 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 543 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_18/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1006.667 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 544 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_18/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 101 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 545 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_18/concat | ConcatV2 | [[1 17 17 384]] | 103.667 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 546 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_18/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 86.667 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 547 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_18/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1814.333 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 548 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_18/mul | Mul | [[1 17 17 1088]] | 109.333 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 549 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_18/add | Add | [[1 17 17 1088]] | 144.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 550 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_18/Relu | Relu | [[1 17 17 1088]] | 106.333 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 551 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_19/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1320.333 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 552 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_19/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 148 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 553 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_19/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 21.333 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 554 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_19/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1551.333 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 555 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_19/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 141.667 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 556 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_19/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 705.333 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 557 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_19/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 100.667 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 558 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_19/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 23 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 559 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_19/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 992.667 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 560 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_19/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 100.667 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 561 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_19/concat | ConcatV2 | [[1 17 17 384]] | 105.667 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 562 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_19/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 83.333 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 563 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_19/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1829.667 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 564 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_19/mul | Mul | [[1 17 17 1088]] | 108 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 565 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_19/add | Add | [[1 17 17 1088]] | 126.333 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 566 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_19/Relu | Relu | [[1 17 17 1088]] | 99.333 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 567 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_20/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1573 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 568 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_20/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 128]] | 1369.333 | 147968 | 147968 | 0 | cpu | 0 | 0 | 0 | 0 |
| 569 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_20/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 128]] | 123 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 570 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_20/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 111.333 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 571 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_20/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 128]] | 21 | 147968 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 572 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_20/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 160]] | 723.333 | 184960 | 184960 | 0 | cpu | 0 | 0 | 0 | 0 |
| 573 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_20/Branch_1/Conv2d_0b_1x7/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 160]] | 103 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 574 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_20/Branch_1/Conv2d_0b_1x7/Relu | Relu | [[1 17 17 160]] | 23.667 | 184960 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 575 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_20/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 192]] | 1011.333 | 221952 | 221952 | 0 | cpu | 0 | 0 | 0 | 0 |
| 576 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_20/Branch_1/Conv2d_0c_7x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 192]] | 99.333 | 221952 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 577 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_20/concat | ConcatV2 | [[1 17 17 384]] | 101.667 | 443904 | 443904 | 0 | cpu | 0 | 0 | 0 | 0 |
| 578 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_20/Branch_0/Conv2d_1x1/Relu | Relu | [[1 17 17 384]] | 82 | 443904 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 579 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_20/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 17 17 1088]] | 1830.333 | 1257728 | 1257728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 580 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_20/mul | Mul | [[1 17 17 1088]] | 105.333 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 581 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_20/add | Add | [[1 17 17 1088]] | 141.667 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 582 | InceptionResnetV2/InceptionResnetV2/Repeat_1/block17_20/Relu | Relu | [[1 17 17 1088]] | 110 | 1257728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 583 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_3/MaxPool_1a_3x3/MaxPool | MaxPool | [[1 8 8 1088]] | 235 | 278528 | 278528 | 0 | cpu | 0 | 0 | 0 | 0 |
| 584 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 256]] | 3432.667 | 295936 | 295936 | 0 | cpu | 0 | 0 | 0 | 0 |
| 585 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_0/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 256]] | 3263.667 | 295936 | 295936 | 0 | cpu | 0 | 0 | 0 | 0 |
| 586 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_2/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 256]] | 149 | 295936 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 587 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_0/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 256]] | 154 | 295936 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 588 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_2/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 256]] | 33.667 | 295936 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 589 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_0/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 256]] | 33.333 | 295936 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 590 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 256]] | 3540.667 | 295936 | 295936 | 0 | cpu | 0 | 0 | 0 | 0 |
| 591 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 256]] | 243 | 295936 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 592 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 17 17 256]] | 35.333 | 295936 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 593 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_0/Conv2d_1a_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 384]] | 3402.667 | 98304 | 98304 | 0 | cpu | 0 | 0 | 0 | 0 |
| 594 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_0/Conv2d_1a_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 384]] | 69.333 | 98304 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 595 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_0/Conv2d_1a_3x3/Relu | Relu | [[1 8 8 384]] | 16 | 98304 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 596 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_1/Conv2d_1a_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 288]] | 3043 | 73728 | 73728 | 0 | cpu | 0 | 0 | 0 | 0 |
| 597 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_1/Conv2d_1a_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 288]] | 55.667 | 73728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 598 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_1/Conv2d_1a_3x3/Relu | Relu | [[1 8 8 288]] | 14.333 | 73728 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 599 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 17 17 288]] | 4243.667 | 332928 | 332928 | 0 | cpu | 0 | 0 | 0 | 0 |
| 600 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_2/Conv2d_0b_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 17 17 288]] | 120.333 | 332928 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 601 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_2/Conv2d_0b_3x3/Relu | Relu | [[1 17 17 288]] | 39.333 | 332928 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 602 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_2/Conv2d_1a_3x3/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 320]] | 1254 | 81920 | 81920 | 0 | cpu | 0 | 0 | 0 | 0 |
| 603 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_2/Conv2d_1a_3x3/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 320]] | 37.333 | 81920 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 604 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/Branch_2/Conv2d_1a_3x3/Relu | Relu | [[1 8 8 320]] | 9.333 | 81920 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 605 | InceptionResnetV2/InceptionResnetV2/Mixed_7a/concat | ConcatV2 | [[1 8 8 2080]] | 123.667 | 532480 | 532480 | 0 | cpu | 0 | 0 | 0 | 0 |
| 606 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_1/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 933.667 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 607 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_1/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 32.667 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 608 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_1/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 975.333 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 609 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_1/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 34.667 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 610 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_1/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 8 8 192]] | 9.667 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 611 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_1/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 224]] | 301.667 | 57344 | 57344 | 0 | cpu | 0 | 0 | 0 | 0 |
| 612 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_1/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 224]] | 29.333 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 613 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_1/Branch_1/Conv2d_0b_1x3/Relu | Relu | [[1 8 8 224]] | 7.333 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 614 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_1/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 256]] | 360.667 | 65536 | 65536 | 0 | cpu | 0 | 0 | 0 | 0 |
| 615 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_1/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 256]] | 33.333 | 65536 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 616 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_1/concat | ConcatV2 | [[1 8 8 448]] | 31.333 | 114688 | 114688 | 0 | cpu | 0 | 0 | 0 | 0 |
| 617 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_1/Branch_0/Conv2d_1x1/Relu | Relu | [[1 8 8 448]] | 11 | 114688 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 618 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_1/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 8 8 2080]] | 1304.667 | 532480 | 532480 | 0 | cpu | 0 | 0 | 0 | 0 |
| 619 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_1/mul | Mul | [[1 8 8 2080]] | 59 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 620 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_1/add | Add | [[1 8 8 2080]] | 107.333 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 621 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_1/Relu | Relu | [[1 8 8 2080]] | 82.667 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 622 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_2/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 910.333 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 623 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_2/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 30.333 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 624 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_2/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 8 8 192]] | 8.333 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 625 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_2/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 960.667 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 626 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_2/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 37.667 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 627 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_2/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 224]] | 293.667 | 57344 | 57344 | 0 | cpu | 0 | 0 | 0 | 0 |
| 628 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_2/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 224]] | 28 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 629 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_2/Branch_1/Conv2d_0b_1x3/Relu | Relu | [[1 8 8 224]] | 8 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 630 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_2/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 256]] | 360 | 65536 | 65536 | 0 | cpu | 0 | 0 | 0 | 0 |
| 631 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_2/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 256]] | 32.333 | 65536 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 632 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_2/concat | ConcatV2 | [[1 8 8 448]] | 30 | 114688 | 114688 | 0 | cpu | 0 | 0 | 0 | 0 |
| 633 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_2/Branch_0/Conv2d_1x1/Relu | Relu | [[1 8 8 448]] | 11.333 | 114688 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 634 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_2/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 8 8 2080]] | 1256 | 532480 | 532480 | 0 | cpu | 0 | 0 | 0 | 0 |
| 635 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_2/mul | Mul | [[1 8 8 2080]] | 58.333 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 636 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_2/add | Add | [[1 8 8 2080]] | 104.333 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 637 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_2/Relu | Relu | [[1 8 8 2080]] | 86.333 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 638 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_3/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 935 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 639 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_3/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 950 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 640 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_3/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 34 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 641 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_3/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 29.667 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 642 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_3/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 8 8 192]] | 8 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 643 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_3/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 224]] | 311.333 | 57344 | 57344 | 0 | cpu | 0 | 0 | 0 | 0 |
| 644 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_3/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 224]] | 28 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 645 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_3/Branch_1/Conv2d_0b_1x3/Relu | Relu | [[1 8 8 224]] | 8 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 646 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_3/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 256]] | 351 | 65536 | 65536 | 0 | cpu | 0 | 0 | 0 | 0 |
| 647 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_3/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 256]] | 32 | 65536 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 648 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_3/concat | ConcatV2 | [[1 8 8 448]] | 29.667 | 114688 | 114688 | 0 | cpu | 0 | 0 | 0 | 0 |
| 649 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_3/Branch_0/Conv2d_1x1/Relu | Relu | [[1 8 8 448]] | 12 | 114688 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 650 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_3/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 8 8 2080]] | 1212 | 532480 | 532480 | 0 | cpu | 0 | 0 | 0 | 0 |
| 651 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_3/mul | Mul | [[1 8 8 2080]] | 57.333 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 652 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_3/add | Add | [[1 8 8 2080]] | 106.667 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 653 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_3/Relu | Relu | [[1 8 8 2080]] | 92 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 654 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_4/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 920.667 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 655 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_4/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 32.333 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 656 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_4/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 923.667 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 657 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_4/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 27 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 658 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_4/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 8 8 192]] | 8 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 659 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_4/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 224]] | 277 | 57344 | 57344 | 0 | cpu | 0 | 0 | 0 | 0 |
| 660 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_4/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 224]] | 27.667 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 661 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_4/Branch_1/Conv2d_0b_1x3/Relu | Relu | [[1 8 8 224]] | 8 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 662 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_4/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 256]] | 351.667 | 65536 | 65536 | 0 | cpu | 0 | 0 | 0 | 0 |
| 663 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_4/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 256]] | 30.333 | 65536 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 664 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_4/concat | ConcatV2 | [[1 8 8 448]] | 29.333 | 114688 | 114688 | 0 | cpu | 0 | 0 | 0 | 0 |
| 665 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_4/Branch_0/Conv2d_1x1/Relu | Relu | [[1 8 8 448]] | 11 | 114688 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 666 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_4/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 8 8 2080]] | 1212.333 | 532480 | 532480 | 0 | cpu | 0 | 0 | 0 | 0 |
| 667 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_4/mul | Mul | [[1 8 8 2080]] | 57.333 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 668 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_4/add | Add | [[1 8 8 2080]] | 103.667 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 669 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_4/Relu | Relu | [[1 8 8 2080]] | 88.667 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 670 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_5/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 931.333 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 671 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_5/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 32 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 672 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_5/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 913.333 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 673 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_5/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 38 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 674 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_5/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 8 8 192]] | 10.333 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 675 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_5/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 224]] | 293.667 | 57344 | 57344 | 0 | cpu | 0 | 0 | 0 | 0 |
| 676 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_5/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 224]] | 28.333 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 677 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_5/Branch_1/Conv2d_0b_1x3/Relu | Relu | [[1 8 8 224]] | 7.667 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 678 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_5/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 256]] | 347.333 | 65536 | 65536 | 0 | cpu | 0 | 0 | 0 | 0 |
| 679 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_5/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 256]] | 31 | 65536 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 680 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_5/concat | ConcatV2 | [[1 8 8 448]] | 29.333 | 114688 | 114688 | 0 | cpu | 0 | 0 | 0 | 0 |
| 681 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_5/Branch_0/Conv2d_1x1/Relu | Relu | [[1 8 8 448]] | 11 | 114688 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 682 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_5/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 8 8 2080]] | 1246.667 | 532480 | 532480 | 0 | cpu | 0 | 0 | 0 | 0 |
| 683 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_5/mul | Mul | [[1 8 8 2080]] | 56.333 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 684 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_5/add | Add | [[1 8 8 2080]] | 106.333 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 685 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_5/Relu | Relu | [[1 8 8 2080]] | 84.667 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 686 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_6/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 931.333 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 687 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_6/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 30.333 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 688 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_6/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 8 8 192]] | 9.333 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 689 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_6/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 907.333 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 690 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_6/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 40.667 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 691 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_6/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 224]] | 302 | 57344 | 57344 | 0 | cpu | 0 | 0 | 0 | 0 |
| 692 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_6/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 224]] | 29.333 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 693 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_6/Branch_1/Conv2d_0b_1x3/Relu | Relu | [[1 8 8 224]] | 7.667 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 694 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_6/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 256]] | 323.667 | 65536 | 65536 | 0 | cpu | 0 | 0 | 0 | 0 |
| 695 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_6/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 256]] | 33 | 65536 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 696 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_6/concat | ConcatV2 | [[1 8 8 448]] | 30 | 114688 | 114688 | 0 | cpu | 0 | 0 | 0 | 0 |
| 697 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_6/Branch_0/Conv2d_1x1/Relu | Relu | [[1 8 8 448]] | 11.333 | 114688 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 698 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_6/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 8 8 2080]] | 1233 | 532480 | 532480 | 0 | cpu | 0 | 0 | 0 | 0 |
| 699 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_6/mul | Mul | [[1 8 8 2080]] | 58 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 700 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_6/add | Add | [[1 8 8 2080]] | 106.667 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 701 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_6/Relu | Relu | [[1 8 8 2080]] | 90.333 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 702 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_7/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 893 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 703 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_7/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 37 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 704 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_7/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 966 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 705 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_7/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 25.667 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 706 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_7/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 8 8 192]] | 8 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 707 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_7/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 224]] | 292 | 57344 | 57344 | 0 | cpu | 0 | 0 | 0 | 0 |
| 708 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_7/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 224]] | 28 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 709 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_7/Branch_1/Conv2d_0b_1x3/Relu | Relu | [[1 8 8 224]] | 8 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 710 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_7/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 256]] | 360 | 65536 | 65536 | 0 | cpu | 0 | 0 | 0 | 0 |
| 711 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_7/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 256]] | 30.667 | 65536 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 712 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_7/concat | ConcatV2 | [[1 8 8 448]] | 29.667 | 114688 | 114688 | 0 | cpu | 0 | 0 | 0 | 0 |
| 713 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_7/Branch_0/Conv2d_1x1/Relu | Relu | [[1 8 8 448]] | 11.667 | 114688 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 714 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_7/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 8 8 2080]] | 1215.333 | 532480 | 532480 | 0 | cpu | 0 | 0 | 0 | 0 |
| 715 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_7/mul | Mul | [[1 8 8 2080]] | 58.333 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 716 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_7/add | Add | [[1 8 8 2080]] | 108.667 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 717 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_7/Relu | Relu | [[1 8 8 2080]] | 93.667 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 718 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_8/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 927.333 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 719 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_8/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 27.333 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 720 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_8/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 909.333 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 721 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_8/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 26.333 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 722 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_8/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 8 8 192]] | 8.667 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 723 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_8/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 224]] | 283 | 57344 | 57344 | 0 | cpu | 0 | 0 | 0 | 0 |
| 724 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_8/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 224]] | 28 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 725 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_8/Branch_1/Conv2d_0b_1x3/Relu | Relu | [[1 8 8 224]] | 7.333 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 726 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_8/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 256]] | 377.333 | 65536 | 65536 | 0 | cpu | 0 | 0 | 0 | 0 |
| 727 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_8/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 256]] | 31.667 | 65536 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 728 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_8/concat | ConcatV2 | [[1 8 8 448]] | 30.667 | 114688 | 114688 | 0 | cpu | 0 | 0 | 0 | 0 |
| 729 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_8/Branch_0/Conv2d_1x1/Relu | Relu | [[1 8 8 448]] | 10.667 | 114688 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 730 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_8/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 8 8 2080]] | 1212.667 | 532480 | 532480 | 0 | cpu | 0 | 0 | 0 | 0 |
| 731 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_8/mul | Mul | [[1 8 8 2080]] | 56.333 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 732 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_8/add | Add | [[1 8 8 2080]] | 107.333 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 733 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_8/Relu | Relu | [[1 8 8 2080]] | 91 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 734 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_9/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 903.333 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 735 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_9/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 35.333 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 736 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_9/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 926.667 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 737 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_9/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 26.333 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 738 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_9/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 8 8 192]] | 8 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 739 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_9/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 224]] | 291.667 | 57344 | 57344 | 0 | cpu | 0 | 0 | 0 | 0 |
| 740 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_9/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 224]] | 29 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 741 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_9/Branch_1/Conv2d_0b_1x3/Relu | Relu | [[1 8 8 224]] | 8 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 742 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_9/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 256]] | 357.667 | 65536 | 65536 | 0 | cpu | 0 | 0 | 0 | 0 |
| 743 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_9/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 256]] | 33.333 | 65536 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 744 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_9/concat | ConcatV2 | [[1 8 8 448]] | 29.333 | 114688 | 114688 | 0 | cpu | 0 | 0 | 0 | 0 |
| 745 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_9/Branch_0/Conv2d_1x1/Relu | Relu | [[1 8 8 448]] | 11.333 | 114688 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 746 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_9/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 8 8 2080]] | 1239.667 | 532480 | 532480 | 0 | cpu | 0 | 0 | 0 | 0 |
| 747 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_9/mul | Mul | [[1 8 8 2080]] | 54 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 748 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_9/add | Add | [[1 8 8 2080]] | 105.667 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 749 | InceptionResnetV2/InceptionResnetV2/Repeat_2/block8_9/Relu | Relu | [[1 8 8 2080]] | 86 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 750 | InceptionResnetV2/InceptionResnetV2/Block8/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 964.667 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 751 | InceptionResnetV2/InceptionResnetV2/Block8/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 192]] | 919.667 | 49152 | 49152 | 0 | cpu | 0 | 0 | 0 | 0 |
| 752 | InceptionResnetV2/InceptionResnetV2/Block8/Branch_0/Conv2d_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 36.667 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 753 | InceptionResnetV2/InceptionResnetV2/Block8/Branch_1/Conv2d_0a_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 192]] | 27 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 754 | InceptionResnetV2/InceptionResnetV2/Block8/Branch_1/Conv2d_0a_1x1/Relu | Relu | [[1 8 8 192]] | 8 | 49152 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 755 | InceptionResnetV2/InceptionResnetV2/Block8/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 224]] | 293 | 57344 | 57344 | 0 | cpu | 0 | 0 | 0 | 0 |
| 756 | InceptionResnetV2/InceptionResnetV2/Block8/Branch_1/Conv2d_0b_1x3/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 224]] | 28.333 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 757 | InceptionResnetV2/InceptionResnetV2/Block8/Branch_1/Conv2d_0b_1x3/Relu | Relu | [[1 8 8 224]] | 8 | 57344 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 758 | InceptionResnetV2/InceptionResnetV2/Block8/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 256]] | 352.667 | 65536 | 65536 | 0 | cpu | 0 | 0 | 0 | 0 |
| 759 | InceptionResnetV2/InceptionResnetV2/Block8/Branch_1/Conv2d_0c_3x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 256]] | 30.667 | 65536 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 760 | InceptionResnetV2/InceptionResnetV2/Block8/concat | ConcatV2 | [[1 8 8 448]] | 33 | 114688 | 114688 | 0 | cpu | 0 | 0 | 0 | 0 |
| 761 | InceptionResnetV2/InceptionResnetV2/Block8/Branch_0/Conv2d_1x1/Relu | Relu | [[1 8 8 448]] | 11 | 114688 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 762 | InceptionResnetV2/InceptionResnetV2/Block8/Conv2d_1x1/BiasAdd | _FusedConv2D | [[1 8 8 2080]] | 1222 | 532480 | 532480 | 0 | cpu | 0 | 0 | 0 | 0 |
| 763 | InceptionResnetV2/InceptionResnetV2/Block8/add | Add | [[1 8 8 2080]] | 107 | 532480 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 764 | InceptionResnetV2/InceptionResnetV2/Conv2d_7b_1x1/BatchNorm/batchnorm/mul | Conv2D | [[1 8 8 1536]] | 3560.333 | 393216 | 393216 | 0 | cpu | 0 | 0 | 0 | 0 |
| 765 | InceptionResnetV2/InceptionResnetV2/Conv2d_7b_1x1/BatchNorm/batchnorm/add_1 | Add | [[1 8 8 1536]] | 134 | 393216 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 766 | InceptionResnetV2/InceptionResnetV2/Conv2d_7b_1x1/Relu | Relu | [[1 8 8 1536]] | 82 | 393216 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 767 | InceptionResnetV2/Logits/AvgPool_1a_8x8/AvgPool | AvgPool | [[1 1 1 1536]] | 45.667 | 6144 | 6144 | 0 | cpu | 0 | 0 | 0 | 0 |
| 768 | InceptionResnetV2/Logits/Flatten/Shape | Shape | [[4]] | 10 | 16 | 16 | 0 | cpu | 0 | 0 | 0 | 0 |
| 769 | InceptionResnetV2/Logits/Flatten/Slice | Slice | [[1]] | 13 | 4 | 4 | 0 | cpu | 0 | 0 | 0 | 0 |
| 770 | InceptionResnetV2/Logits/Flatten/Slice_1 | Slice | [[3]] | 19.333 | 12 | 12 | 0 | cpu | 0 | 0 | 0 | 0 |
| 771 | InceptionResnetV2/Logits/Flatten/Prod | Prod | [[]] | 17.333 | 4 | 4 | 0 | cpu | 0 | 0 | 0 | 0 |
| 772 | InceptionResnetV2/Logits/Flatten/ExpandDims | ExpandDims | [[1]] | 7 | 4 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 773 | InceptionResnetV2/Logits/Flatten/concat | ConcatV2 | [[2]] | 14.333 | 8 | 8 | 0 | cpu | 0 | 0 | 0 | 0 |
| 774 | InceptionResnetV2/Logits/Flatten/Reshape | Reshape | [[1 1536]] | 7 | 6144 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 775 | InceptionResnetV2/Logits/Logits/MatMul | MatMul | [[1 1001]] | 587.667 | 4004 | 4004 | 0 | cpu | 0 | 0 | 0 | 0 |
| 776 | InceptionResnetV2/Logits/Logits/BiasAdd | BiasAdd | [[1 1001]] | 11 | 4004 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
| 777 | InceptionResnetV2/Logits/Predictions | Softmax | [[1 1001]] | 41.333 | 4004 | 0 | 0 | cpu | 0 | 0 | 0 | 0 |
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